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RT9481 copyright ? 2015 richtek technology corporatio n. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 1 easy to use power bank solution (ezp b s tm ) integrated chip with switch charger, adc, and load switch general description the rt948 1 is a high integration and easy to use power solution for li - ion power bank and other powered handheld applications. we call it ezpbs tm (easy to use power bank solution). this single chip includes a switching charger with boost function, analog to digital converter (adc), usbout load switch, adapter detection with bc1.2, dcp controller and ldo. applications ? power bank orderi ng information note : richtek products are : ? rohs compliant and compatible with the current requirements of ipc/jedec j - std - 020. ? suitable for use in snpb or pb - free soldering processes . pin configurations (top view ) wqfn - 2 4 l 4 x 4 features system ? high accuracy voltage/current regulation ? ? 1% charge voltage regulation ? ? 0.1a charge current regulation ? ? 3% boost output voltage regulation ? thermal shutdown protection ? reverse leakage protection to prevent battery d rainage. ? built - in usbout dcp c ontroller ? built - in usbout a ttach /d etach detection ? built - in usbout light load detection ? built - in load switch with current regulation thermal regulation and output short current protection ? built - in adapter d etection wi th bc1.2 ? built - in accurate adc to measure vbat, vbus, ts, ibat , usbout and iusbout ? built - in ld o ? interrupt output for event notification ? i 2 c interface with 400 k hz charge m ode ? charge voltage regulation : 3.65v to 4.6 v ? charge current regulation : 0.7a to 2. 7 a ? minimum input voltage regulation (mivr) : 4.2v to 4.8v ? average input current regulation (aicr) : 0.1a to 2a ? charge termination current : 0.15a to 0.6a ? pre - charge t hreshold : 2.3v to 3.8v ? pre - charge c urrent : 0.2a to 0.5a ? thermal regulation ? vmid under vo ltage protection ? v bus over voltage p rotection ? battery over voltage p rotection ? bad adapter detection boost m ode ? b oost output c urrent u p to 3 a ? b oost o ut put v oltage : 3.65v to 5.2v ? battery under voltage protection : 2.5v to 3.2v ? vmid o ver v oltage p rotect ion p a c k a g e t y p e q w : w q f n - 2 4 l 4 x 4 ( w - t y p e ) ( e x p o s e d p a d - o p t i o n 2 ) r t 9 4 8 1 l e a d p l a t i n g s y s t e m g : g r e e n ( h a l o g e n f r e e a n d p b f r e e ) u s b o u t u s b o u t v h m i d v b u s v b u s d - d p d + i s e n s p i s e n s n d m t s s c l s d a a g n d v d d a v d d 2 8 v i n t l x p g n d b o o t v m i d l x p g n d a g n d 1 2 3 4 5 6 7 8 9 1 0 1 2 1 1 1 8 1 7 1 6 1 5 1 4 1 3 2 1 2 0 1 9 2 4 2 2 2 3 2 5
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 2 marking information typical application circuit 3 x = y m d n n 3 x = : p r o d u c t c o d e y m d n n : d a t e c o d e v m i d v h m i d r t 9 4 8 1 d - a g n d b o o t 3 6 2 4 2 3 1 5 , 2 5 ( e x p o s e d p a d ) 1 f / 2 5 v c 1 i n p u t p o w e r 2 2 f x 2 c 8 i n t u s b o u t s c l 1 3 1 8 1 7 s d a d m v d d 2 8 v 1 6 1 , 2 1 1 o u t p u t p o w e r 1 f c 9 v b u s c 3 4 , 5 l x 2 1 , 2 2 8 i s e n s p 1 f / 2 5 v r 2 r 1 1 f / 2 5 v c 2 v d d a 1 4 1 f c 4 d + 7 4 7 n f c 7 1 h 1 0 f c 6 9 i s e n s n 2 . 2 f c 5 + - b a t t e r y p r o t e c t i c r n t c 1 0 k 1 0 t s d p 1 2 r 4 r 5 r 6 v d d a 1 f c 1 0 p g n d 1 9 , 2 0 q 1 r 3 1 0 m l 1 o p t i o n ?
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 3 functional pin description pin no. pin name pin function 1, 2 usbout usb power output. 3 vhmid internal use only . 4, 5 vbus vbus power supply . 6 d - d - input for adapter detection. 7 d+ d+ input for adapter detection. 8 isensp charging current sensing positive node . 9 isensn charging current sensing negative node and connect to battery plus terminal. 10 ts battery temperature detection pi n. 11 dm dcp controller dm output . 12 dp dcp controller dp output . 13 vdd28v in ternal use ldo output . 14 vdda internal power f or analog blocks, put 1 ? f t o gnd. 15 , 25 (exposed pad) agnd analog ground node. the exposed pad must be soldered to a large p cb and connected to a gnd for maximum power dissipation. 16 int interrupter signal . connect an external pull - up resistor. 17 sda data input and output for i 2 c serial port. connect an external pull - up resistor. 18 scl clock input for i 2 c serial port. conn ect an external pull - up resistor. 19, 20 pgnd power ground for switching charger. 21, 22 lx internal switch node t o output inductor connection . 23 vmid connection point between reverse blocking and high - side. 24 boot bootstrap power node f or switching charger .
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 4 function blocks diagram operation the RT9481 is a high integrated ic for li - ion battery power bank. it includes a switch charger 2.7a, a synchronous boost 5v. cha r ge current base on thermal regulation function , the charging current can support up to 2.7a. vbus over voltage protection if the input voltage (vbus) is higher than the threshold voltage v ovp , the internal ovp signal will go high and the charger will stop charging until vin is below v ovp ? hysteresis. vmid over voltage protection if the internal voltage (vmid) is higher than the threshold voltage v ovp , the internal ovp signal will go high and the charger will stop charging until vmid is below v ovp ? hysteresis. vmid under voltage protection if the inte rnal voltage (vmid) is lower than the threshold voltage vuvp, the internal vmid_uvp signal will go high and the system will disable ldsw function in order to protect system from short - to - ground current damages. usbout scp the usbout short circuit protectio n (scp) function will prevent system from burning out by monitoring the voltage drop between ldsw. if the usbout is short to ground, the inrush current will make the vds voltage too large to damage chip. the scp function also reports this condition to prot ect chip in time. boost ocp the converter senses the current signal when the high - side p - mosfet turns on. as a result, the ocp is cycle by - cycle current limitation. if the ocp occurs, the converter holds off the next on pulse until inductor current drops b elow the ocp limit. otp the converter has an over - temperature protection. when the junction temperature is higher than the thermal shutdown rising threshold, the system will be latched and the output voltage will no longer be m o s a n a l o g b a s e 2 . 7 a s w c h g 3 a b o o s t c o n t r o l l e r v m i d u s b o u t d p d m v d d 2 8 v i n t b o o t v d d a l x p g n d i s e n s n t s i s e n s p v b u s s d a s c l l d s w a t t a c h / d e t a c h d c p c o n t r o l v h m i d l d o 2 . 8 v c e n t r a l l o g i c c o n t r o l a d c i u s b o u t i b a t v b u s v b a t v d d a a d a p t e r d e t e c t i o n d + d - a g n d u s b o u t
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 5 regulated until the junction temperature drops under the falling threshold. cc/cv/tr multi loop controller there are constant current loop, constant voltage loop and thermal regulation loop to control the charging current. base circuits base circuits provide the internal power, vdda a nd reference voltage and bias current. buck regulator for charging and boost regulator as boost the multi - loop controller controls the operation of charging process and current supply to the system. it also controls the circuits as a boost converter for bo ost applications. usb charger detection the RT9481 detects usb charger (standard charger port, charging downstream port and dedicated charger port) via d + and d - pins. i 2 c controller the key parameters of charging and boost are programmable through i 2 c com mands.
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 6 absolute maximum ratings (note 1) ? vbus , vhmid supply input voltage -------------------------------- -------------------------------- ------------ ? ? 0.3 v to 1 8 v ? v mid -------------------------------- -------------------------------- -------------------------------- --------------------- ? ? 0.3 v to 6.7v ? lx , boot -------------------------------- -------------------------------- -------------------------------- -------------- ? ? 0.3 v to 6 v ? v mid ? vbus , boot ? lx -------------------------------- -------------------------------- ------------------------- ? ? 0.3 v to 6v ? others -------------------------------- -------------------------------- -------------------------------- ------------------- ? ? 0.3 v to 6v ? power dissipation, p d @ t a = 25c wqfn - 24l 4x4 -------------------------------- -------------------------------- -------------------------------- ------ ? 3.57w ? package thermal resistance (note 2 ) wqfn - 24l 4x4 , ? j a -------------------------------- -------------------------------- -------------------------------- - ? 28 ? c/w wqfn - 24l 4x4 , ? j c -------------------------------- -------------------------------- -------------------------------- - ? 7.1 ? c/ w ? lead temperature (soldering, 10 sec.) -------------------------------- -------------------------------- -------- ? 260 ? c ? junction temperature -------------------------------- -------------------------------- ------------------------------ ? 15 0 ? c ? storage temperature range -------------------------------- -------------------------------- --------------------- ? ? 65 ? c to 150 ? c ? esd susceptibility (note 3 ) hbm (human body model) -------------------------------- -------------------------------- ------------------------ ? 2 k v mm (machine mode l ) -------------------------------- -------------------------------- ------------------------------- ? 200v recommended operating conditions (note 4 ) ? supply i nput voltage -------------------------------- -------------------------------- -------------------------------- - ? 4.3v to 5. 65 v ? junction temperature range -------------------------------- -------------------------------- --------------------- ? ? 40 ? c to 125 ? c ? ambient temperature range -------------------------------- -------------------------------- ---------------------- ? ? 40 ? c to 85 ? c electrical characteristics ( v bus = 5v, v bats = 4.2v, t a = 25 ? c, unless otherwise specified) parameter symbol test conditions min t yp max unit i nput power source vbus operation range 4 -- 5.65 v vbus supply current i q pwm switching, i chg = i bat = 0ma -- 10 -- ma high impendence mode -- -- 200 ? a leakage current from battery i bat_leak v bat = 4.2v, v bus = 0v, c harger off. 1/80 adc execution time duty -- 40 60 ? a protection vbus ovp threshold voltage v bus_ovp vbus rising 5.7 6 6.3 v vbus ovp hysteresis v bus_ovp_ hys vbus falling -- 200 -- mv vbus uvlo v bus_uvlo vbus rising 3 3.25 3.5 v
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 7 parameter symbol test conditions min t yp max unit vbus uvlo hysteresis v bus_uvlo_ hys vbus falling -- 15 0 -- mv isensn ovp v bat_ovp visensn rising 103 107 114 % isensn ovp hysteresis v bat_ovp_ hys visensn falling -- 5 -- % over temperature protection t otp (note 5 ) -- 16 0 -- ? c otp hysteresis t otp _hys -- 2 0 -- ? c thermal regulation threshold t reg opti onal 100/ 120 /135 ? c by i 2 c (default value is 120 ? c ) -- 120 -- ? c input power source detection poor source detect threshold v bus_pr bad voltage source detection 3.6 3.8 4 v poor source detect deglitch t vbus_pr_dg -- 30 -- ms poor source detect hysteresi s v bus_pr_hys vbus rising 100 -- 200 mv current sink to gnd i vbus_pr during poor source detection -- 50 -- ma detection interval time t vbus_pr_int -- 2 -- s sleep mode comparator sleep - mode entry threshold vbus ? isensn v slp 3v < v isensn < v batreg , v bus falling -- 40 100 mv sleep - mode exit hysteresis vbus symbol isensn v slpexit 3v < v isensn < v batreg, vbus rising 40 120 200 mv sleep - mode deglitch time t slp vbus rising above v slp + v slpexit -- 30 -- ms minimum input voltage regulation (mivr) minim um input voltage regulation v mivr optional 4.2v to 4.8v by i 2 c per 0.1v (default value is 4.7v ) 4.2 -- 4.8 v v mivr accuracy ? 5 -- 5 % average input current regulation (aicr) accuracy i aicr_100ma i aicr = 100ma 80 90 100 ma i aicr_500ma i aicr = 500ma 400 450 500 i aicr_700ma i aicr = 700ma 560 630 700 i aicr_1000ma i aicr = 1000ma 800 900 1000 aicr range i aicr optional 100m a to 2000ma by i 2 c (default value is 0.5a ) 100 -- 2000 ma vdda regulator vdda voltage vdda v vbus > 4.5v -- 4.5 -- v v vbus < v isensn -- v isensn -- vdda uvlo v dda_uv vdda ris ling 2.4 2.5 2.6 v vdda uvlo hysteresis v dda_uv_hys vdda fall ing -- 150 -- m v
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 8 parameter symbol test conditions min t yp max unit battery voltage regulation battery voltage regulation v batreg optional 3.65v to 4.6 v by i 2 c per 25mv (default value is 4.2v ) 3.65 -- 4.6 v v batreg accuracy ? 1 -- 1 % re - charge threshold v reg v isensn falling, ? v reg = (v batreg ? ? v rec ) 50 125 200 mv re - charge deglitch time t rec -- 128 -- ms charging current regulation output charging current i chg r sense = 10m ? , optional 0.7a to 2.7 a by i 2 c per 0.25a (def ault value is 0 .7a ) 0.7 -- 2.7 a i chg accuracy i chg_acc r sense = 10m ? ? 100 -- 100 ma pre - charge threshold v prec rising , optional 2.3v to 3.8v by i 2 c per 0.1v (default value is 3v ) 2.3 -- 3.8 v v prec accuracy ? 5 -- 5 % pre - charge current i prec optio nal 200ma to 500ma by i 2 c per 100ma (default value is 300ma ) 200 -- 500 ma i prec accuracy ? 20 -- 20 % charge termination detection end of charge current i eoc r sense = 10m ? , optional 150ma to 600ma by i 2 c (default value is 200ma ) 150 -- 600 ma i eoc ac curacy r sense = 10m ? ? 100 -- 100 ma deglitch time for eoc t eoc i chg < i eoc , v isensn > (v batreg ? ? v reg ) optional 4 m s to 32 m s by i 2 c (default value is 32 m s ) 4 -- 32 m s charger timer protection fast - charge time - out optional 6hrs to 20hrs by i 2 c per 2hrs (default value is 20hrs ) 6 -- 20 hrs pre - charge time - out optional 30mins to 60mins by i 2 c per 15mins (default value is 60mins ) 30 -- 60 mins pwm switching charger vbus to lx resistance r ds(on) _ vbus _ lx from vbus to lx, as iaicr disable or i aicr = 2a -- 97 -- m ? vbus to usbout resistance r ds(on) _ vbus _ usbout from vbus to usbout -- 98 -- m ? low - side on - resistance r ds(on) _ ls from lx to pgnd -- 35 -- m ?
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 9 parameter symbol test conditions min t yp max unit efficiency for charge eff_chg v bus = 5v, v isensn = 4v, and i chg = 2a -- 90 -- % oscillator frequen cy f osc -- 0.75 -- mhz frequency accuracy ? 10 -- 10 % maximum duty cycle d max at minimum voltage input -- 95 -- % minimum duty cycle d ( min ) 0 -- -- % peak ocp as charger mode -- 4.5 -- a boost mode operation output voltage level v boost to vmid optional 3.625v to 5.2v by i 2 c per 25mv (default value is 5.1v ) 3.625 -- 5.2 v output voltage accuracy ? 3 -- 3 % output current on vmid i bst v bat > 3v 3 -- -- a efficiency for boost eff_bst v mid = 5v, v isensn = 4v, and loading = 2a -- 92 -- % peak o cp as boost mode i ocp_bst -- 6 -- a vmid ovp as reverse boost v ovp_bst vmid rising -- 6 -- v vmid ovp hysteresis v ovp_bst_ hys vmid falling -- 200 -- mv battery uvp for boost v batmin fa lling , i 2 c programmable per 0.1 v optional 2.5v to 3.2v by i 2 c per 0 .1v (default value is 3 v ) 2.5 -- 3.2 v ntc function current source for ntc 10k ? its_10k 33 35 37 ? a load switch for usbout supply voltage v sw 2.5 5 5.5 v load switch on resistance of mosfet r ds(o n ) _sw v mid = 5v, i o = 1000ma -- 35 -- m ? current re gulation o f load switch for 3a i lim_ls -- 3 -- a load switch uvp delta v sw_uvp_d vmid ? vusbout -- 1.4 -- v light load detection c urrent i det_10ma detection current -- 10 -- ma thermal regulation threshold of the load switch t reg _lsw optional 100 ? c to 135 ? c by i 2 c (default value is 100 o c ) -- 100 -- ? c adapter detection d+ voltage source v d+_src 0.5 -- 0.7 v vdat_ref voltage v dat_ref 0.25 -- 0.4 v vlgc voltage v lgc 0.8 -- 2 v d - sink current i dn_sink 50 -- 150 ? a
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 10 parameter symbol test conditions min t yp max unit usbout attach/detach detection usbout attach voltage -- 1.45 -- v usbout attach/detach threshold -- 3.3 -- ? a detect time 1 v bat = 3v, c out = 30 ? f, 0x24[4:2] = 010 -- 375 -- ms detect time 2 v bat = 3v, c out = 50 ? f, 0x24[4:2] = 100 -- 600 -- ms ldo 2 .8v output voltage v out_ 2 .8v c out = 1 ? f 2.66 2 .8 2.94 v output current i out_ 2 .8v vdda > 3v 10 -- -- ma the time for vout ready t rdy_ 2 .8v c out = 1 ? f 1 -- -- ms adc characteristics resolution -- 12 -- bit measurement error v gerr vbat and ts ? 10 -- 10 m v ? 20 ? c to 70 ? c, vba t and ts ? 20 -- 20 conversion time t conv -- -- 25 ms logic inputs (sda scl) sda, scl input threshold voltage high - level 1.5 -- -- v low - level -- -- 0.4 open drain low voltage vodl i sink = 1ma -- -- 0.4 v i 2 c timing characteristics scl cloc k rate f scl vdda = 3.3v -- -- 400 khz hold time (repeated) start condition. after this period, the first clock pulse is generated t hd;sta 0.6 -- -- ms input power dcp controller power uvlo threshold voltage from vmid v uvlo_r_ dcp _ctrl rising 3.9 4.1 4.3 v uvlo hysteresis v uvlo_f_ cp_ ctrl falling 100 200 300 mv dcp controller supply current i dcp_ctrl 4.5v < v uid < 5v -- 150 200 ? a bc1.2 dcp mode dp and dm shorting resistance r dpm_short v dp = 0.8v, i dm = 1ma -- 157 200 ? resistance between dp/dm and gnd r dchg_ short dp = 0.8v 350 656 1150 k ? voltage threshold on dp1 under which the device goes back to divider mode v dpl_th_det falling 310 330 350 mv
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 11 parameter symbol test conditions min t yp max unit hysteresis v dpl_th_det _hys rising -- 9 0 -- mv divider mode dp output voltage for d ivider mode v dp_2.7v v uid = 5v 2.57 2.7 2.84 v dm output voltage for divider mode v dm_2v v uid = 5v 1.9 2 2.1 v dp output impedance for divider mode r dp_pad1 i dp = ? 5 ? a 24 30 36 k ? dm output impedance for divider mode r dm_pad1 i dm = ? 5 ? a 24 30 36 k ? dp and dm shorting resistance r pm_short -- 150 200 ? 1.2v / 1.2v mode dp output voltage for 1.2v mode v dp_1.2v 1.12 1.2 1.28 v dp output impedance for 1.2v mode r d p_pad 80 102 130 k ? note 1. stresses beyond those listed absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the ope rational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ? ja is measured at t a = 25 ? c on a high effective thermal conductivity four - layer test board per jedec 51 - 7. ? jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution recommended. note 4. the device is not guaranteed to funct ion outside its operating conditions. note 5. guarantee b y d esign.
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 12 typical operating characteristics boost efficiency vs output current 0 10 20 30 40 50 60 70 80 90 100 0 500 1000 1500 2000 2500 3000 output current (ma) efficiency (%) v in = 3v v in = 3.4v v in = 3.7v v in = 3.9v v out = 5v, l = 1h (tdk spm6530) charging efficiency vs. charging current 80 82 84 86 88 90 92 94 96 98 100 500 1000 1500 2000 2500 3000 charging current (ma) efficiency (%) v bus = 5v, l = 1h (tdk spm6530), c in = 1f v bat = 3.3v, v out = 5v, i out = 1000ma, l = 1 ? h, c out = 10 ? f v lx (2v/ div ) v out_ac (50mv/ div ) time (500ns/ div ) steady state v lx (2v/ div ) v out_ac (50mv/ div ) time (500ns/ div ) steady state v bat = 3.3v, v out = 5v, i out = 2500ma, l = 1 ? h, c out = 10 ? f v lx (2v/ div ) v out_ac (50mv/ div ) time (500ns/ div ) steady state v bat = 3.7v, v out = 5v, i out = 1000ma, l = 1 ? h, c out = 10 ? f v lx (2v/ div ) v out_ac (50mv/ div ) time (500ns/ div ) steady state v bat = 3.7v, v out = 5v, i out = 2500ma, l = 1 ? h, c out = 10 ? f
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 13 application information switching charger the switching charger integrates a synchronous pwm controller with power mosfets to provide minimum inp ut voltage regulation (mivr), average input current regulation (aicr), high accuracy current and voltage regulation, and charge termination. in charge mode, the switching charger supports a precision charging system for single cell. in boost mode, the swit ching charger works as the boost converter. and in high impedance mode, the switching charger stops charging or boosting and operates in a mode with low current from battery to reduce the power consumption when the portable device is in standby mode. noti ce that the switching charger does not integrate input power source (ac adapter or usb input) charging detection. thus, the switching charger does not set the charge current automatically. the charge current needs to be set via i 2 c interface by the host. t he switching charger application mechanism and i 2 c compatible interface are introduced in later sections. charge mode operation minimum input voltage regulation (mivr) the switching charger features minimum input voltage regulation function to prevent inp ut voltage drop due to insufficient current provided by the adaptor or usb input. if mivr function is enabled, the input voltage decreases when the over current of the input power source occurs. vbus is regulated at a predetermined voltage level which can be set as 4.2v to 4.8v per 0.1v by i 2 c interface. at this time, the current drawn by the switching charger equals to the maximum current value that the input power can provide at the predetermined voltage level, instead of the set value. table 1. mivr re gister setting table mivr[2:0] v mivr 000 disable 001 4.2v 010 4.3v 011 4.4v 100 4.5v 101 4.6v 110 4.7v (default) 111 4.8v charge profile the switching charger provides a precision li - ion or li - polymer charging solution for single - cell applications . input current limit, charge current, termination current, charge voltage and input voltage mivr are all programmable via the i 2 c interface. in charge mode, the switching charger has five control loops to regulate input current, charge current, charge vol tage, input voltage mivr and device junction temperature. during the charging process, all five loops (if mivr is enabled) are enabled and the dominant one will take over the control. for normal charging process, the li - ion or li - polymer battery is charge d in three charging modes depending on the battery voltage. at the beginning of the charging process, the switching charger is in pre - charge mode. when the battery voltage rises above pre - charge threshold voltage (v prec ), the switching charger enters fast - charge mode. once the battery voltage is close to the regulation voltage (v batreg ), the switching charger enters constant voltage mode. pre - charge mode for life - cycle consideration, the battery can not be charged with large current under low battery condit ion. when the isensn pin voltage is below pre - charge threshold voltage (v prec ), the charger is in pre - charge mode with a weak charge current witch equals to the pre - charge current (i prec ). in pre - charge mode, the charger basically works as a linear charger . the pre - charge current also acts as the current limit when the isensn pin is shorted. the pre - charge current levels are 200ma to 500ma programmed by i 2 c per 100ma.
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 14 table 2. vprec register setting table vprec[2:0] pre - charge threshold 0000 2.3v 0001 2. 4v 0010 2.5v 0011 2.6v 0100 2.7v 0101 2.8v 0110 2.9v 0111 3v (default) 1000 3.1v 1001 3.2v 1010 3.3v 1011 3.4v 1100 3.5v 1101 3.6v 1110 3.7v 1111 3.8v table 3. iprec register setting table iprec[1:0] pre - charge current 00 200ma 01 300ma (d efault) 10 400ma 11 500ma fast - charge mode and settings as the isensn pin rises above v prec , the charger enters fast - charge mode and starts switching. notice that the switching charger does not integrate input power source (ac adapter or usb input) dete ction. thus, the switching charger does not set the charge current automatically. unlike the linear charger (ldo), the switching charger (buck converter) is a current amplifier. the current drawn by the switching charger is different from the current into the battery. the user can set the average input current regulation (aicr) and output charge current (i chrg ) respectively. cycle - by - cycle current limit the charger of the switching charger has an embedded cycle - by - cycle current limit for inductor. once the inductor current touches the threshold, the charger stops charging immediately to prevent over current from damaging the device. notice that, the mechanism can no t be disabled by any way. average input current regulation (aicr) the aicr levels are 100ma t o 2a programmed by i 2 c per 50ma. charge current (i chrg ) the charge current into the battery is determined by the sense resistor (r sense ) and icc setting by i 2 c. the voltage between the isensp and isensn pins is regulated to the voltage control by icc setti ng. as the r sense is 10m ? , the fast - charge currents are 700ma to 2.7a programmed by i 2 c per 250ma. table 4. ichg register setting table ichg[3:0] vcc ichg r sense is 10m ? 0000 7mv 0.7a (default) 0001 9.5mv 0.95a 0010 12mv 1.2a 0011 14.5mv 1.45a 0100 1 7mv 1.7a 0101 1.95mv 1.95a 0110 2.2mv 2.2a 0111 2.45mv 2.45a 1000 2.7mv 2.7a constant voltage mode and settings the switching charger enters constant voltage mode when the vbat voltage is close to the output - charge voltage (v batreg ). once in this mode , the charge current begins to decrease. for default settings (charge current termination is disabled), the switching charger does not turn off and always regulates the battery voltage at v batreg . however, once the charge current termination is enabled, th e charger terminates if the charge current is below termination current (i eoc ) in constant - voltage mode. the charge current termination function is controlled by the i 2 c interface. after termination, a new charge cycle restarts when one of the following co nditions is detected : ? the isensn pin voltage falls below the v batreg as v rec threshold. ? vbus power on reset (por). ? enable bit toggle or charger reset (via i 2 c interface).
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 15 output charge voltage (v batreg ) the output - charge voltage is set by the i 2 c interf ace. its range is from 3.65v to 4.6v per 25mv. termination current (i eoc ) if the charger current termination is enabled (te bit = 1), the end - of - charge current is determined by both the termination current sense voltage (v eoc ) and sense resistor (r sense ). as r sense is 10m ? , i eoc is set by the i 2 c interface from 150ma to 600ma. table 5. eoc register setting table eoc[2:0] veoc ieoc r sense is 10m ? 000 disable disable 001 1.5mv 150ma 010 2mv 200ma (default) 011 2.5mv 250ma 100 3mv 300ma 101 4mv 400ma 110 5mv 500ma 111 6mv 600ma input voltage protection in charge mode during charge mode, there are two protection mechanisms against if input power source capability is less than the charging current setting. one is aicr and the other is minimum input vo ltage regulation. a suitable level of aicr can prevent vbus drop by the insufficient capability. as the aicr setting is not suitable, mivr will regulate the vbus in the setting level and sink the maximum current of power source. sleep mode (v vbus ? ? vbat < v slp ) the switching charger enters sleep mode if the voltage drop between the vbus and isensn pins falls below v slp . in sleep mode, the reverse blocking switch and pwm are all turned off. this function prevents battery drain during poor or no input power source. input over voltage protection when vbus rises above the input over voltage threshold, the switching charger stops charging and then sets fault status bits. the condition is released when vbus falls below ovp threshold. the switching charger then resumes charging operation. reverse boost mode operation trigger and operation the switching charger features boost support. when boost function is enabled, the synchronous boost control loop takes over the power mosfets. in boost mode, the vmid pin is reg ulated to 5v (typ.) to support other boost devices connected to the usb connector. output over - voltage protection in boost mode, the output over voltage protection is triggered when the vmid voltage is above the output ovp threshold. when ovp occurs, the b oost converter stops switching and turns off immediately. battery protection battery over - voltage protection in charge mode the switching charger monitors the vbat voltage for output over voltage protection. in charge mode, if the vbat voltage rises above v ovp_bat x v batreg , such as when the battery is suddenly removed, the switching charger stops charging and then sets fault status bits and sends out fault pulse at the int pin. the condition is released when the vbat voltage falls below (v ovp_bat ? ? v ovp_bat ) x v ovp_bat . the switching charger then resumes charging process with default settings and the fault is cleared. low battery voltage protection (lbp) when the battery voltage is lower than a specified value, the converter will stop switching. until the battery voltage rises above the low battery voltage protection threshold plus hysteresis voltage value, the converter resumes switching. the low battery voltage protection can be programmed with 8 different levels (2.5v to 3.2v).
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 16 table 6. lbp r egister setting table lbp[2:0] low battery protection level 000 2.5v 001 2.6v 010 2.7v 011 2.8v 100 2.9v 101 3v (default) 110 3.1v 111 3.2v usb battery charging specification the RT9481 supports adapter detection for dedicated charging port, charg ing downstream port and standard downstream port by d - and d+. usb dedicated charging port controller the RT9481 supports an usb dedicated charging port (dcp) controller. the dcp controller detects usb data line voltage, and automatically provides the corr ect electrical signatures on the data lines (dm and dp) to charge compliant devices. irq and sta operation RT9481 summarize all irq items in the register table. all irq_status registers are implemented as reset after read. if irq_enable bit is low, the irq _status bit will not update status. irq_enable will mask irq_status to trigger irq low, so the system can decide which interrupt is necessary. when sta low to high or high to low irq will be trigger but sta will keep situation and cannot be masked only ma sk irq. figure 1. irq and sta operation r e g : t s d i p i n : i n t e v e n t : t s d r e g : t s d i m 0 : n o t m a s k e v e n t 1 : m a s k e v e n t e v e n t i s n o t m a s k f o r c h g _ s t a 2 , c h g _ s t a 3 a n d m i s c _ s t a 2 r e g i s t e r r e g : c h g _ s t a 2 _ a l t i 2 c r e a d c l e a r i n t e r r u p t i s m a s k i 2 c r e a d c l e a r r e g : i e o c i p i n : i n t e v e n t : i e o c r e g : i e o c i m i 2 c r e a d c l e a r 0 : n o t m a s k e v e n t 1 : m a s k e v e n t f l a g i s m a s k f o r c h g _ i r q a n d m i s c _ i r q r e g i s t e r
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 17 figure 2. charger mode flow charger mode flow the charger mode is start from adapter attached, the flag of vbus_stai (misc_sta2[5]) will be set to hi gh and the host can read this bit to check adapter attached or not. then adapter type detection will auto start to detect the type of adapter with bc1.2 standard. its detection result is show in the flag adapter_stai (misc_sta1[6:5]) when adapter_done (mis c_irq[6]) is set. the host could decide the user charger setting by adapter type, like aicr or ichg etc for example, set iaicr to 0.5a, if the adapter type is sdp. set iaicr to 1.5a, if the adapter type is cdp or dcp. if there is no charger fault event t riggered in registers chg_stat1 or chg_stat2, the host can decide to turn on charger or not. set user charger setting from registers chg_ctrl1 to chg_ctrl6 before turn on charger. please refer to i2c register map for detailed functional setting. to enable charger by setting opa_mode (chg_ctrl1[0]) to low and setting switching_en (chg_sta1[0]) to high. when charging is start the host can check chg_stat (chg_sta1[5]) to make sure the charging is in progress. if system want to implement the charge and bypass f eature, the host can set en_ldsw (usbout_ctl[6]) to high to turn on load switch and set en_dcp (usbout_ctl[7]) to high to turn on dcp controller, then the power of adapter could bypass to device when battery is under charging. charger terminate there are t hree conditions to terminate charger and the host could set switching_en (chg_sta1[0]) to low to turn off charger. end of charge (eoc) set te (chg_ctrl1[1]) to high to enable termination function, then the charger will terminate automatically and chtermi (chg_irq[7]) is set to high when the charging current is below ieoc (chg_ctrl5[2:0]) and charging voltage is above re - charge threshold. the host could turn on charger again when chrchgi (chg_irq[5]) is set. charger fault the charger automatically terminate s when charger fault event be triggered in table 7. r e a d a d a p t e r t y p e r e a d a d a p t e r _ s t a i ( m i s c _ s t a 1 [ 6 : 5 ] ) w h e n a d a p t e r _ d o n e i ( m i s c _ i r q [ 6 ] ) = 1 c h e c k a d a p t e r a t t a c h e d v b u s _ s t a i ( m i s c _ s t a 2 [ 5 ] ) = 1 ? y e s c h a r g e r t e r m i n a t e n o n o y e s n o y e s c h e c k c h a r g e r f a u l t ? u s e r c h a r g e r s e t t i n g a n d t u r n o n c h a r g e r o p a _ m o d e ( c h g _ c t r l 1 [ 0 ] ) = 0 s w i t c h i n g _ e n ( c h g _ s t a 1 [ 0 ] ) = 1 e o c ? o r c h a r g e r f a u l t ? o r a d a p t e r d e t a c h e d ? c h a r g e r m o d e s t a r t s
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 18 table 7 . charger fault event charger fault event flag register power status pwr_rdy = 0 chg_sta1[2] thermal shutdown tsd_stat = 1 chg_sta2[7] vbus ovp vbusovp_stat = 1 chg_sta2[6] reverse protection chrvp_stat = 1 chg_sta2[5] battery ovp chbatov_stat = 1 chg_sta2[4] good adaptor detection chggoodadp_stat = 0 chg_sta2[1] bad adaptor detection chgbadadp_stat = 1 chg_sta2[0] adapter detach the flag of vbus_stai will be set to low when adapter detac hed and it will terminate charger directly.
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 19 figure 3. boost mode flow y e s n o y e s n o n o y e s b o o s t m o d e s t a r t s c h e c k d e v i c e a t t a c h e d u s b o u t _ s t a i ( m i s c _ s t a 2 [ 4 ] ) = 1 ? c h e c k b o o s t f a u l t ? u s e r b o o s t s e t t i n g a n d t u r n o n b o o s t o p a _ m o d e ( c h g _ c t r l 1 [ 0 ] ) = 1 s w i t c h i n g _ e n ( c h g _ s t a 1 [ 0 ] ) = 1 c h e c k b o o s t s o f t - s t a r t f i n i s h a n d t u r n o n l o a d s w i t c h a n d d c p c o n t r o l l e r e n _ l d s w ( u s b o u t _ c t l [ 6 ] ) = 1 e n _ d c p ( u s b o u t _ c t l [ 7 ] ) = 1 t u r n o n u s b o u t l i g h t l o a d d e t e c t i o n d e l a y t i m e ( t u l d > 1 0 0 m s ) t h e n s e t u s b o u t l d _ l v l ( u s b o u t _ c t l [ 5 : 3 ] ) b o o s t f a u l t ? o r u s b o u t l i g h t l o a d ? b o o s t t e r m i n a t e
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 20 boost mode flow the boost mode could start from device attached, and the flag of usbout_stai (misc_sta2[4]) will be set to high for indicate the device a ttached. the usbout attach detection is control by register attach_ctl[5]. if there is no any boost fault triggered in registers chg_stat2 or bst_irq or misc_irq, the host can decide to turn on boost or not. the host can set user boost setting before turn on the boost from registers chg_ctrl1 to chg_ctrl6 and please refer to i2c register map for detailed functional setting. the boost could be enable by set opa_mode (chg_ctrl1[0]) to high and setting switching_en (chg_sta1[0]) to high. before enable the load switch suggest to wait boost soft start (chg_irq[3]) finish, it can guarantee the boost ready for output. then the host could set en_ldsw (usbout_ctl[6]) to high to turn on load switch and the boost would start output current to device. for let device ide ntify the power bank is a powerful adapter, to set en_dcp (usbout_ctl[7]) to high to turn on dcp controller at the same time. usbout light load detection (usboutld_ctl[5:3]) can help the host to check the device charging full or device detached by the con dition of usbout current is under the threshold or not. but according to usb standard, the device will start charging after it connect to adapter 100 millisecond. we suggest to add delay time t uld over 100 millisecond before enable usbout light load detect ion after load switch turn on. it could avoid usbout light load detection trigger early. the host could read boost_stat (chg_sta1) to make sure the boost is in progress. discharging terminate there are two conditions to terminate discharging. boost fault t he boost automatically terminates when boost fault event be triggered in table 8. table 8 . boost fault event boost fault event flag register thermal shutdown tsd_stat chg_sta2[2] boost thermal shutdown bsttsdi bst_irq[7] vmid over voltage protect bstvm idvpi bst_irq[6] battery voltage is too low bstlowvi bst_irq[5] load switch short current protect ldsw_scpi misc_irq[5] vmid short current protect vmidscpi misc_irq[1] vmid under voltage protect vmiduvpi misc_irq[0] usbout light load it means device c harging full or device detached when usboutld_stat (misc_sta2) set to high. according to usboutld_stat, the host could decide to turn off boost or not. figure 4. adc conversion operation flow s e t a d c c h a n n e l c h _ s e l ( a d c _ c l t [ 7 : 5 ] ) a n d s t a r t a d c c o n v e r s i o n a d c _ s t a r t ( a d c _ c l t [ 0 ] ) = 1 a d c c o n v e r s i o n s t a r t s f i n i s h a d c c o n v e r s i o n c h e c k a d c c o n v e r s i o n c o m p l e t e a d c _ d o n e i ( m i s c _ i r q [ 7 ] ) = 1 o r a d c _ s t a t ( m i s c _ s t a t 1 ) = 0 r e a d a d c c o d e a d c _ c o d e h [ 7 : 0 ] a d c _ c o d e l [ 7 : 0 ] a n d c a l c u l a t e m e a s u r e m e n t
RT9481 copyright ? 2015 richtek technology corp oration. all rights reserved. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 21 adc conversion operation flow fig ure 4 shows adc conversion operation flow. adc conversion starts from set adc channel ch_sel (adc_clt[7:5]) and set adc_start (adc_clt[0]) to high. adc conversion time is 25ms and adc_donei (misc_irq[7]) will set to high and adc_stat (misc_stat1) will set to low also, the host could read them to make sure adc conversion completes. the host could read adc code high byte (adc_codeh[7:0]) and low byte (adc_codel[7:0]) to calculate the voltage or current measurement relative to adc channel. table 9 shows the e very measurement equation of adc channe l. please pay attention to the calculation of irs, it need to consider the setting of ichg (chg_ctrl6[7:4]). adc code format is unsigned. if operation is charger mode, ivrs means battery charging current. if operatio n is boost mode, irs means battery discharging current. the code of irs is invalid if switching_en (chg_sta1[0]) is set to low. and the code of iusbout is invalid if en_ldsw (usbout_ctl[6]) is set to low. the ts pin will automatic output 35ua during adc t s channel under conversion. it will cause the ir drop on ntc thermistor and then adc measure the voltage on ts pin. the host could get the temperature by mapping the voltage. we suggest to use 10 k ? ntc which the beta (b25/85) is 3435 k , like semitec 103at. table 9 . calculate voltage o r current measurement adc channel measurement equation measurement range vbat vbat = ( ( adc_codeh x 256 ) + adc_codel ) x 1.25 mv 0v to vdda vbus vbus = ( ( adc_codeh x 256 ) + adc_codel ) x 6.25 mv 1v to 18v usbout usbout = ( ( adc_codeh x 256 ) + adc_codel ) x 6.25 mv 1v to 6v ts ts = ( ( adc_codeh x 256 ) + adc_codel ) x 1.25 mv 0v to vdda irs irs = ( ( adc_codeh x 256 ) + adc_codel ) x ichg x 1.25 ma 0a to 6a iusbout iusbout = ( ( adc_codeh x 256 ) + adc_codel ) x 2.5 ma 0a to 6a
RT9481 copyright ? 2015 rich tek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 22 thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ? ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ? ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 ? c . the junction to ambient thermal resistance, ? ja , is layout dependent. for wqfn - 24l 4x4 package, the thermal resistance, ? ja , is 28 ? c /w on a standard jedec 51 - 7 four - layer thermal test board. the maximum power dissipation at t a = 25 ? c can be calculated by the followin g formula : p d(max) = (125 ? c ? 25 ? c ) / (28 ? c /w) = 3.57w for wqfn - 24l 4x4 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ? ja . the derating curve in figure 5 allows the desi gner to see the effect of rising ambient temperature on the maximum power dissipation. figure 5. derating curve of maximum power dissipation 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 23 i 2 c interface rt 948 1 i 2 c slave address = 7'b11011 0 0 . i 2 c interface support fast mode (bit rate up to 400kb/s). the write or read bit stream (n ? 1) is shown below : s 0 1 a p l s b m s b a a s s u m e a d d r e s s = m d a t a f o r a d d r e s s = m d a t a f o r a d d r e s s = m + n - 1 a d a t a f o r a d d r e s s = m + 1 s 0 p a s s u m e a d d r e s s = m d a t a f o r a d d r e s s = m d a t a f o r a d d r e s s = m + n - 1 d a t a f o r a d d r e s s = m + 1 s r s l a v e a d d r e s s r e g i s t e r a d d r e s s s l a v e a d d r e s s d a t a 1 r / w r / w d a t a n l s b m s b a a a a a a a a r e a d n b y t e s f r o m r t 9 4 8 1 l s b m s b d a t a 2 d a t a n l s b m s b l s b s l a v e a d d r e s s r e g i s t e r a d d r e s s d a t a 1 d a t a 2 m s b m s b l s b w r i t e n b y t e s t o r t 9 4 8 1
RT9481 copyright ? 2015 richtek technology corpor ation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 24 i 2 c register map register of the swchg function register address b[7] (m sb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) low bat ctrl 0x00 meaning fix_ freq sel_ swfreq higher_ ocp hz lbp enable lbp[2:0] default 1 1 0 0 1 1 0 1 read/ write r/w r/w r/w r/w r/w r/w r/w r/w fix_freq control the switching frequency to be dyn amic or fix 0 : auto - change frequency 1 : fixed frequency (default) sel_ swfreq the switching frequency selection bit (charger/ boost ) 0 : the switching frequency is 1.5mhz 1 : the switching frequency is 0.75mhz (default) higher_ ocp higher_ocp enable 0 : disable (default) 1 : higher il ocp level selection of buck mode and boost mode hz 0 : not high impedance mode (default) 1 : high impedance lbp enable low battery protection enable 0 : disable 1 : enable (default) lbp[2:0] define low battery protectio n level. the default voltage is 3v. code voltage code voltage code voltage code voltage 000 2.5v 010 2.7v 100 2.9v 110 3.1v 001 2.6v 011 2.8v 101 3v (default) 111 3.2v
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 25 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[ 0] (lsb) charger control 1 0x01 meaning iaicr[ 5 :0] te opa_ mode default 0 0 1 0 1 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w iaicr[ 5 :0] define aicr current. the default current is 0.5a. code current code current code current code current 000000 disable 010000 0.8a 100000 1.6a 110000 2a 000001 0.1a 010001 0.85a 100001 1.65a 110001 2a 000010 0.1a 010010 0.9a 100010 1.7a 110010 2a 000011 0.15a 010011 0.95a 100011 1.75a 110011 2a 000100 0.2a 010100 1a 100100 1.8a 110100 2a 000101 0. 25a 010101 1.05a 100101 1.85a 110101 2a 000110 0.3a 010110 1.1a 100110 1.9a 110110 2a 000111 0.35a 010111 1.15a 100111 1.95a 110111 2a 001000 0.4a 011000 1.2a 101000 2a 111000 2a 001001 0.45a 011001 1.25a 101001 2a 111001 2a 001010 0.5a (default) 011010 1.3a 101010 2a 111010 2a 001011 0.55a 011011 1.35a 101011 2a 111011 2a 001100 0.6a 011100 1.4a 101100 2a 111100 2a 001101 0.65a 011101 1.45a 101101 2a 111101 2a 001110 0.7a 011110 1.5a 101110 2a 111110 2a 001111 0.75a 011111 1.55a 101111 2a 111111 2a te termination enable 0 : disable charge current termination (default) 1 : enable charge current termination opa_mode 0 : charger mode (default) 1 : boost mode
RT9481 copyright ? 2015 richtek technology corpor ation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 26 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger control 2 0x02 meaning chg_cv[5:0] reversed reversed default 0 1 0 1 1 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w chg_cv[5:0] define battery regulation voltage. the delta - v of the battery regulation voltage is 25mv. the de fault voltage is 4.2v. code voltage code voltage code voltage code voltage 000000 3.65v 010000 4.05v 100000 4.45v 110000 4.6v 000001 3.675v 010001 4.075v 100001 4.475v 110001 4.6v 000010 3.7v 010010 4.1v 100010 4.5v 110010 4.6v 000011 3.725v 0100 11 4.125v 100011 4.525v 110011 4.6v 000100 3.75v 010100 4.15v 100100 4.55v 110100 4.6v 000101 3.775v 010101 4.175v 100101 4.575v 110101 4.6v 000110 3.8v 010110 4.2v (default) 100110 4.6v 110110 4.6v 000111 3.825v 010111 4.225v 100111 4.6v 110111 4. 6v 001000 3.85v 011000 4.25v 101000 4.6v 111000 4.6v 001001 3.875v 011001 4.275v 101001 4.6v 111001 4.6v 001010 3.9v 011010 4.3v 101010 4.6v 111010 4.6v 001011 3.925v 011011 4.325v 101011 4.6v 111011 4.6v 001100 3.95v 011100 4.35v 101100 4.6v 111 100 4.6v 001101 3.975v 011101 4.375v 101101 4.6v 111101 4.6v 001110 4v 011110 4.4v 101110 4.6v 111110 4.6v 001111 4.025v 011111 4.425v 101111 4.6v 111111 4.6v chg : 3.65v + chg_cv x 0.025v, max. : 4.6v
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 27 function register address b[7] (msb) b[6] b [5] b[4] b[3] b[2] b[1] b[0] (lsb) charger control 3 0x03 meaning boos t _cv[5:0] treg_sel[1:0] default 1 1 1 0 1 1 0 1 read/ write r/w r/w r/w r/w r/w r/w r/w r/w boost _cv[5:0] define boost regulation voltage. the delta - v of the boost v oltage is 2 5mv. the default voltage is 5.1v. code voltage code voltage code voltage code voltage 000000 3.625v 010000 4.025v 100000 4.425v 110000 4.825v 000001 3.65v 010001 4.05v 100001 4.45v 110001 4.85v 000010 3.675v 010010 4.075v 100010 4.475v 110010 4.875 v 000011 3.7v 010011 4.1v 100011 4.5v 110011 4.9v 000100 3.725v 010100 4.125v 100100 4.525v 110100 4.925v 000101 3.75v 010101 4.15v 100101 4.55v 110101 4.95v 000110 3.775v 010110 4.175v 100110 4.575v 110110 4.975v 000111 3.8v 010111 4.2v 100111 4 .6v 110111 5v 001000 3.825v 011000 4.225v 101000 4.625v 111000 5.025v 001001 3.85v 011001 4.25v 101001 4.65v 111001 5.05v 001010 3.875v 011010 4.275v 101010 4.675v 111010 5.075v 001011 3.9v 011011 4.3v 101011 4.7v 111011 5.1v (default) 001100 3.9 25v 011100 4.325v 101100 4.725v 111100 5.125v 001101 3.95v 011101 4.35v 101101 4.75v 111101 5.15v 001110 3.975v 011110 4.375v 101110 4.775v 111110 5.175v 001111 4v 011111 4.4v 101111 4.8v 111111 5.2v boost : 3.625 + boost _cv x 0.025v, boost max.: 5.2v treg_sel[1:0] define thermal regulation level 00 : 100 ? c 01 : 120 ? c (default) 10 : 135 ? c 11 : 135 ? c
RT9481 copyright ? 2015 richtek technology corpor ation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 28 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger control 4 0x04 meaning tmr2x_en jeita wt_fc wt_prc en_tmr default 1 0 1 1 1 1 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w tmr2x_en run charge timer in half clock rate during mivr, aicr and thermal regulation. 0 : disable 2x extended charger timer 1 : enable 2x extended charger timer (default) jeita jeita function 0 : charging regulation current is ichg (default) 1 : charging regulation current is ichg/2 wt_fc define fast charge timer. the default time is 20 hours. code hours code hours code hours code hours 000 6 hours 010 10 hours 100 14 hours 110 1 8 hours 001 8 hours 011 12 hours 101 16 hours 111 20 hours (default) wt_prc define pre - charge charge timer 00 : 30mins 01 : 45mins 10 : 60mins (default) 11 : 60mins en_tmr 0 : disable internal timer function (default) 1 : enable internal timer functio n function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger control 5 0x05 meaning mivr[2:0] iprec[1:0] eoc[2:0] default 1 1 0 0 1 0 1 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w mivr[2:0] define vmivr vo ltage. the default voltage is 4.7v. code voltage code voltage code voltage code voltage 000 disable 010 4.3v 100 4.5v 110 4.7v (default) 001 4.2v 011 4.4v 101 4.6v 111 4.8v iprec[1:0] define pre - charge current 00 : 200ma 01 : 300ma (default) 10 : 4 00ma 11 : 500ma eoc[2:0] define termination current (ieoc rsense is 10m ? ). the default current is 200ma. code current code current code current code current 000 disable 010 200ma (default) 100 300ma 110 500ma 001 150ma 011 250ma 101 400ma 111 600ma
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 29 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger control 6 0x06 meaning ichg[3:0] vprec[3:0] default 0 0 0 0 0 1 1 1 read/ write r/w r/w r/w r/w r/w r/w r/w r/w ichg[3:0] define charging regulation current. the default current is 7mv (0.7a). code current code current code current code current 0000 7mv (0.7a) (default) 0100 17mv (1.7a) 1000 27mv (2.7a) 1100 27mv (2.7a) 0001 9.5mv (0.95a) 0101 19.5mv (1.95a) 1001 27mv (2.7a) 1101 27mv (2.7a) 0010 12mv (1.2 a) 0110 22mv (2.2a) 1010 27mv (2.7a) 1110 27mv (2.7a) 0011 14.5mv (1.45a) 0111 24.5mv (2.45a) 1011 27mv (2.7a) 1111 27mv (2.7a) external sensing r : charge current sense voltage (current equivalent for 10m ? sense resistor) vprec[3:0] define pre - charge threshold. the default voltage is 3v. code voltage code voltage code voltage code voltage 0000 2.3v 0100 2.7v 1000 3.1v 1100 3.5v 0001 2.4v 0101 2.8v 1001 3.2v 1101 3.6v 0010 2.5v 0110 2.9v 1010 3.3v 1110 3.7v 0011 2.6v 0111 3v (default) 1011 3. 4v 1111 3.8v function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger control 7 0x07 meaning reversed reversed reversed reversed reversed tdeg_eoc default 0 0 0 0 0 1 1 1 read/ write r/w r/w r/w r/w r/w r/w r/w r/w td eg_eoc [2:0] eoc de - glitch time code time code time code time code time 000 32 ? s 010 128 ? s 100 4ms 110 16ms 001 64 ? s 011 256 ? s 101 8ms 111 32ms (default
RT9481 copyright ? 2015 richtek technology corpor ation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 30 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger status1 0x 08 meaning uugpump_ stat vbat_ lvl chg_ stat chg_ done boost_ stat pwr_ rdy swbase_en switching _en default 0 1 0 0 0 0 1 0 read/ write r r r r r r r/w r/w uugpump_stat uug pump enable status 0 : uug pump is disable 1 : uug pump is enable vbat_lvl ba ttery voltage level detect under charging 0 : battert voltage is lower than pre - charge level 1 : battery voltage is higher than fast - charge level chg_stat charging status 0 : charging is not in progress 1 : charging is in progress chg_done charger done i ndication bit 0 : charging is not done 1 : charging is done boost_stat 0 : not in boost mode 1 : boost mode pwr_rdy power status bit 0 : vbus > vbus_ovp or vbus < vbus_uvlo or vbus < isensn + vslp (power fault) 1 : vbus_uvlo < vbus < vbus_ovp & vbus > isensn + vslp (power ready) swbase_en switching charger base circuit enable 0 : disabled 1 : enabled switching_en charger/ boost enable 0 : charger/ boost is disabled 1 : charger/ boost is enabled
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 31 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger status 2 0x09 meaning tsd_ stat vbuso vp_stat chrvp_ stat chbatov_ stat reversed reversed chggooda dp_ stat chgbadad p_ stat default 0 0 0 0 0 0 1 0 read/ write r r r r r r r r tsd_stat thermal shutdown fault. set when the die temperature exceeds thermal shutdown threshold. 0 : thermal shutdown is not on going 1 : thermal shutdown is on going vbusovp_stat vbus over voltage protection. set when vbus > vin_ovp is detected. 0 : vbus is not over voltage 1 : vbus is over voltag e chrvp_stat charger fault. reverse protection fault (vbus < isensn + vslp) 0 : reverse protection is not occur 1 : reverse protection is occur chbatov_stat charger fault. battery ovp. 0 : battery is not ovp 1 : battery is ovp chggoodadp_stat good adapt or detection. it is only enabled in the vbus plug - in. once it pass the detection, it will always high and enable charging. 0 : adaptor is not good adaptor 1 : adaptor is good adaptor chgbadadp_stat bad adaptor detection. it is used to indicate the adapt or input voltage is lower than 3.8v during the charging 0 : adaptor is not bad adaptor 1 : adaptor is bad adaptor function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger status 3 0x0a meaning chtreg_ stat chmivr_ stat cha icr_ stat chrchg_s tat reversed reversed reversed reversed default 0 0 0 0 0 0 0 0 read/ write r r r r r/w r/w r/w r/w chtreg_stat charger warning. thermal regulation loop active. 0 : thermal regulation loop is not active 1 : thermal regulation loop i s active chmivr_stat charger warning. input voltage mivr loop active. 0 : mivr loop is not active 1 : mivr loop is active chaicr_stat charger warning. input current aicr loop active. 0 : aicr loop is not active 1 : aicr loop is active chrchg_stat indica te battery voltage is below re - charge level under charging 0: battery voltage higher re - charge level 1 : battery voltage lower re - charge level
RT9481 copyright ? 2015 richtek technology corpor ation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 32 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) chg_ irq 0x0b meaning chter mi ieoc chrc hgi chtm rfi softsta rti reversed chg_ stat2_alt chg_ stat3_alt default 0 0 0 0 0 0 0 0 read/ write r/c r/c r/c r/c r/c r/w r/c r/c chtermi charge terminated. ieoc charge current is lower than eoc current. chrchgi re - charge request. cht mrfi charger fault. time - out (fault). softstarti charger or boost soft - start finish chg_stat2_alt the status of chg_stat2 register is change chg_stat3_alt the status of chg_stat3 register is change function register address b[7] (msb) b[6] b[5] b[4 ] b[3] b[2] b[1] b[0] (lsb) bst_ irq 0x0c meaning bsttsdi bstvmid ovpi chrc hgi reversed reversed reversed reversed reversed default 0 0 0 0 0 0 0 0 read/ write r/c r/c r/c r/w r/w r/w r/w r/w bsttsdi boost fault. thermal shutdown; auto set opa_mod e and switching_en to low. bstvmidovpi boost fault. vmid ovp; auto set opa_mode and switching_en to low. bstlowvi boost fault. battery voltage is too low; auto set opa_mode and switching_en to low.
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 3 3 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger status 2 control 0x0d meaning tsdi_ statm vbusov p_statm chrvp_ statm chbatov_ statm reversed reversed chggooda dp_statm chgbadad p_statm default 0 0 0 0 0 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w tsdi_ statm t hermal shutdown interrupt mask 0 : interrupt is not masked 1 : interrupt is masked vbusovp_statm vbus over voltage protection interrupt mask 0 : interrupt is not masked 1 : interrupt is masked chrvp_statm reverse protection interrupt mask 0 : interrupt i s not masked 1 : interrupt is masked chbatov_statm battery ovp interrupt mask 0 : interrupt is not masked 1 : interrupt is masked chggoodadp_statm good adaptor detection interrupt mask 0 : interrupt is not masked 1 : interrupt is masked chgbadadp_statm bad adaptor detection interrupt mask 0 : interrupt is not masked 1 : interrupt is masked function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger status 3 control 0x0e meaning chtreg_ statm chmivr_ statm chaicr_ statm chgrchg_ s tatm reversed reversed reversed reversed default 0 0 0 1 0 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w chtreg_statm thermal regulation loop active interrupt mask 0 : interrupt is not masked 1 : interrupt is masked chmivr_statm input voltage m ivr loop active interrupt mask 0 : interrupt is not masked 1 : interrupt is masked chaicr_statm input current aicr loop active interrupt mask 0 : interrupt is not masked 1 : interrupt is masked chgrchg_statm battery voltage re - charge level interrupt mask 0 : interrupt is not masked 1 : interrupt is masked
RT9481 copyright ? 2015 richtek technology corpor ation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 34 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) charger irq control 0x0f meaning chtermim ieocm chrchg im chtmrfim softsta rtim reversed chg_ stat2_altm chg_ sta t3_alt m default 0 0 0 0 0 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w chtermim charge terminated interrupt mask 0 : interrupt is not masked 1 : interrupt is masked ieocm charge current is lower than eoc current interrupt mask 0 : interrupt is not masked 1 : interrupt is masked chrchgim charger re - charge request interrupt mask 0 : interrupt is not masked 1 : interrupt is masked chtmrfim chtmrfi interrupt mask 0 : interrupt is not masked 1 : interrupt is masked softstartim softstarti interrup t mask 0 : interrupt is not masked 1 : interrupt is masked chg_ stat2_altm chg_ stat2_alt interrupt mask 0 : interrupt is not masked 1 : interrupt is masked chg_ stat3_altm chg_ stat3_alt interrupt mask 0 : interrupt is not masked 1 : interrupt is masked function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) boost irq control 0x10 meaning bsttsdim bstvmid ovpim bstlow vim reversed reversed reversed reversed reversed default 0 0 0 0 0 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r /w r/w bsttsdim boost fault. thermal shutdown interrupt mask 0 : interrupt is not masked 1 : interrupt is masked bstvmidovpim boost fault. vmid ovp interrupt mask 0 : interrupt is not masked 1 : interrupt is masked bstlowvim boost fault. battery voltage is too low interrupt mask 0 : interrupt is not masked 1 : interrupt is masked
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 35 register of the adc & ldsw & dcp control & adapter detection & attach control & reset function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) adc_ ctl 0x20 meaning ch_sel reversed zero_ check reversed reversed adc_ start default 0 0 0 0 0 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w ch_sel adc channel selection. code chanel code chanel code chanel code chanel 000 vbat (default) 010 usbo ut /5 100 vrs 110 adchin1 001 vbus/5 011 ts 101 vldsw 111 adchin2 zero_check zero check 0 : disable zero check, follow ch_sel setting (default) 1 : enable zero check, short adc + and adc - adc_start adc start control 0 : force to stop adc conversio n (default) 1 : start adc conversion (auto clear when conversion done) function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) adc codeh 0x21 meaning adc_codeh default 0 0 0 0 0 0 0 0 read/ write r r r r r r r r a dc_codeh adc code high byte function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) adc codel 0x22 meaning adc_codel default 0 0 0 0 0 0 0 0 read/ write r r r r r r r r adc_codel adc code low byte
RT9481 copyright ? 2015 richtek technology corpor ation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 36 fun ction register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) usbout control 0x23 meaning en_ dcp en_ ldsw reversed reversed reversed reversed ldsw_ treg[1:0] default 0 0 0 0 0 1 0 1 read/ write r/w r/w r/w r/w r/w r/w r/w r/w en_dcp d cp controller enable 0 : dcp controller disable (default) 1 : dcp controller enable en_ldsw load switch enable 0 : load switch disable (default) 1 : load switch enable ldsw_treg[1:0] thermal regulation level 00 : disable 01 : 100 ? c (default) 10 : 120 ? c 11 : 135 ? c function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) attach control 0x24 meaning en_ adapterdet en_ vbusat en_ usboutat usboutat_time usboutat_ mode reversed default 1 1 1 0 1 1 0 0 read/ write r/w r/ w r/w r/w r/w r/w r/w r/w en_adapterdet adapter type detect enable 0 : adapter detect disable 1 : adapter detect enable (default) en_vbusat vbus attach/detach detect enable 0 : vbus attach/detach detect disable 1 : vbus attach/detach detect enable (defau lt) en_usboutat usbout attach/detach detect enable 0 : usbout attach/detach detect disable 1 : usbout attach/detach detect enable (default) usboutat_time usbout attach/detach detection time. code time code time 000 detection time 150ms 100 detection time 600ms 001 detection time 250ms 101 detection time 700ms 010 detection time 375ms 110 detection time 925ms 011 detection time 475ms 111 detection time 1125ms usboutat_mode usbout attach detect mode 0 : normal mode 1 : power saving mode, power sa ve 50% and detection time increase 100%
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 37 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) misc_ sta1 0x25 meaning adc_ sta adapter_sta reversed reversed reversed reversed reversed default 0 1 1 0 0 0 0 0 read/ write r r r r/w r/w r/w r/w r/w adc_sta adc status 0 : adc is idle 1 : adc conversion is on going adapter_sta vbus adapter type 00 : sdp with d+ / d - floating 01 : sdp 10 : cdp 11 : dcp function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1 ] b[0] (lsb) misc_ sta2 0x26 meaning ldswreg _stat usboutld _stat vbus_stat usbout_ stat vddauvp_ stat ldsw_ stat reversed reversed default 0 0 0 0 0 0 0 0 read/ write r r r r r r r/w r/w ldswreg_stat load switch warning. ldsw output current regulati on loop active 0 : ldsw output current regulation loop is not active 1 : ldsw output current regulation loop is active usboutld_stat usbout light load indicator 0 : usbout loading > usboutlc_lvl or disable 1 : usbout loading < usboutlc_lvl vbus_stat vbus connection status 0 : vbus has no adapter connect (vbus < vbus_por) 1 : vbus has adapter connect (vbus > uvlo & vbus > isensn + vslp) usbout_stat usbout device connection status 0 : usbout has no device connect 1 : usbout has device connect vddauvp_stat vdda under voltage protect, disable swchg, ldsw, dcp control, adapter detection, adc and ts driver when vddauvp is occur. 0 : vdda uvp is not trigger 1 : vdda uvp is trigger ldsw_stat load switch status 0 : load switch is turn off 1 : load switch is turn on
RT9481 copyright ? 2015 richtek technology corpor ation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 38 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) misc_ irq 0x27 meaning adc_ donei adapter_ donei ldsw_ scpi ldswrdyi misc_ sta2_alt wdti vmidsc pi vmiduv pi default 0 0 0 0 0 0 0 0 read/ write r/c r/c r/c r/c r/c r/c r/c r/w adc_donei adc conversion done interrupt adapter_donei adapter detection done interrupt ldsw_scpi load switch short current protect interrupt ldswrdyi load switch turn on ready misc_ sta2_alt the status of misc_ sta2_alt register is change wdti wdt interrupt vmidscpi vmid short current protect interrupt, auto set en_ldsw to 0 vmiduv pi vmid under voltage protect interrupt, auto set en_ldsw to 0 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) mis c_ sta2 control 0x28 meaning ldswreg_s tatm usboutld _statm vbus_ statm usbout_s tatm vddauvp_ statm ldsw_ statm reversed reversed default 0 0 0 0 0 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w ldswreg_statm ldswreg_stat interrupt mask 0 : interrup t is not masked 1 : interrupt is masked usboutld_statm usboutld_stat interrupt mask 0 : interrupt is not masked 1 : interrupt is masked vbus_statm vbus_stat i interrupt mask 0 : interrupt is not masked 1 : interrupt is masked usbout_statm usbout_stat int errupt mask 0 : interrupt is not masked 1 : interrupt is masked vddauvp_statm vddauvp_stat interrupt mask 0 : interrupt is not masked 1 : interrupt is masked ldsw_statm ldswm_stat interrupt mask 0 : interrupt is not masked 1 : interrupt is masked
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 39 func tion register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) misc_ irq_ ctrl 0x29 meaning adc_ doneim adapter_ doneim ldsw_ scpim ldswr dyim misc_ sta2_ altm reversed vmidsc pim vmiduv pim default 0 0 0 0 0 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w adc_doneim adc_donei interrupt mask 0 : interrupt is not masked 1 : interrupt is masked adapter_doneim adapter_donei mask 0 : interrupt is not masked 1 : interrupt is masked ldsw_scpim ldsw_scpi mask 0 : interrupt is not masked 1 : interrupt is masked ldswrdyim ldswrdyim mask 0 : interrupt is not masked 1 : interrupt is masked misc_ sta2_altm misc_ sta2_alt mask 0 : interrupt is not masked 1 : interrupt is masked vmidscpim vmidscpi mask 0 : interrupt is not masked 1 : interrupt i s masked vmiduvpim vmiduvpi mask 0 : interrupt is not masked 1 : interrupt is masked function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) reset 0x2a meaning reset default 0 0 0 0 0 0 0 0 read/ write w w w w w w w w reset reset control register 0x96 : reset, reset whole chip include register and circuit 0x3c : reg_rst, reset whole register setting to default only
RT9481 copyright ? 2015 richtek technology corpor ation. all rights reserved. is a registered trademark of richtek technology corporation . www.richtek.com ds9481 - 00 june 2015 40 function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) wdt_ ctrl 0x2b mea ning wdt_ en reversed wdt reversed reversed reversed wdt_ refr esh default 0 0 0 0 0 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w w wdt_en wdt enable control 0 : wdt disable (default) 1 : wdt enable wdt watch dog timer, it will reset whole chip wh en time out 00 : 8 second (default) 01 : 16 second 10 : 32 second 11 : 64 second wdt_refresh watch dog timer refresh 0 : no action 1 : refresh watch dog timer function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) ldsw_ ilim_fuse 0x2c meaning reversed reversed ldsw_ilim_fuse default 0 0 0 0 0 0 0 0 read r r r r r r r r ldsw_ilim_fuse report the fuse setting of ldsw current regulation function register address b[7] (msb) b[6] b[5] b[4] b[3] b[2] b[1] b[0] (lsb) ldsw_ ili m_ ctrl 0x2d meaning ldsw_ilim_lvl ldsw_ilim_ctrl default 0 1 1 0 0 0 0 0 read/ write r/w r/w r/w r/w r/w r/w r/w r/w ldsw_ilim_lvl ldsw current regulation 00 : min = 1.0a, typ = 2.0a, max = 3.0a 01 : min = 1.5a, typ = 2.5a, max = 3.5a 10 : min = 2.0 a, typ = 3.0a, max = 4.0a ldsw_ilim_ctrl ldsw current regulation setting
RT9481 copyright ? 2015 richtek technology corporation. all rights re served. is a registered trademark of richtek technology corporation . ds9481 - 00 june 2015 www.richtek.com 41 outline dimension symbol dimensions in millimeters dimensions in inches min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0 .180 0.300 0.007 0.012 d 3.950 4.050 0.156 0.159 d2 option 1 2. 4 00 2. 50 0 0.09 4 0. 098 option 2 2.650 2.750 0.104 0.108 e 3.950 4.050 0.156 0.159 e2 option 1 2. 4 00 2. 50 0 0.09 4 0. 098 option 2 2.650 2.750 0.104 0.108 e 0.500 0.020 l 0.350 0.450 0. 014 0.018 w - type 24l qfn 4x4 package richtek technology corporation 14f, no. 8, tai yuen 1 st street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry a nd/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is curre nt and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnished by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of richtek or its su bsidiaries.

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